This invention relates to an image processing system and method which speedily process image data by use of a processor array.
A conventional processor array comprises processor elements which are equal in a number to X.times.Y, where each of X and Y represents an integer greater than one. Ordinarily, each of the processor elements is in charge of predetermined image elements. Therefore, in case that the processor array can process, in parallel, the image elements, accelerating of process is easily realized in response to a number of the processor elements. While, in case that the processor array can not process, in parallel, the image elements, for example, in case that the processor array process the image elements which are processed in base on an image process algorithm that has a collating sequence so that the processor array processes an image element after processing another image element, there is a problem that accelerating of process is, in situ, not realized in response to the number of the processor elements. Conventionally, to resolve the problem of the type, there is provided an image processing system which is described in Japanese Examined Patent Prepublication No. 36544/1988. This image processing system comprises an execution control system which is based on data operation of command level so that each of the processor elements can dynamically detect and process a command which is capable of being processed. Namely, the image processing system produces numbers of the processor elements which are in charge of execution numbers of data to be queued, commands to be executed in case that queuing conditions are realized, a command to be next executed, and packets having informations related to execution and control. The image processing system supplies the packets to a combined network of the processor elements. When the packet arrives at a predetermined one of the processor elements and when a queuing condition is realized, the one of the processor elements executes commands which are written in the packet to produce a packet having an information of a command to be next executed.
The image processing system has a disadvantage that the image processing system is complex. This is because, since it needs to enter the informations of execution into the packet, the packet becomes greater. Therefore, it is complex to produce and process the packet and it needs a plurality of bandwidths of the combined network which is supplied with the packet.
The image processing system has another disadvantage that an unwanted overhead occurs when a serial sequence of commands is executed. This is because, the image processing system starts, through the packet, the even command which is capable of being, in series, executed, a number of unwanted processing steps occurs in comparsion with general pipeline execution when the serial sequence of commands is executed. This is described in such as the document ["consideration on architecture optimization in data operation computer" written Sakai et al., Journal of Institute of Information Vol. 30, No. 12, pp. 1562-1571].